`ifndef CTRL_V
`define CTRL_V


`include "defines.v"

module ctrl(
	// from ex
	input  wire[`InstAddrWidth - 1 : 0]	jump_addr_i,
	input  wire    	 					jump_en_i,
	input  wire   	 					hold_flag_i,
	
	// to pc_reg
	output reg[`InstAddrWidth - 1 : 0]	jump_addr_o,
	output reg    	 					jump_en_o,

	// to instf_id, id_ex
	output reg   	 					hold_flag_o	
);

always @(*) begin
	jump_addr_o = jump_addr_i;
	jump_en_o   = jump_en_i;
	if((jump_en_i == 1'b1) || (hold_flag_i == 1'b1)) begin 
		hold_flag_o = 1'b1;
	end
	else begin
		hold_flag_o = 1'b0;
	end
end

endmodule


`endif // CTRL_V